1. Field
Exemplary embodiments of the present invention relate to a semiconductor device fabrication technology, and more particularly, to a complementary metal-oxide semiconductor (CMOS) image sensor and a method for fabricating the same.
2. Description of the Related Art
A complementary metal-oxide semiconductor (CMOS) image sensor is an integrated sensor having a block configured to amplify or process signal in a sensor chip using an active element such as a MOS or CMOS transistor.
In general, a unit pixel of the CMOS image sensor includes one photodiode PD and four NMOS transistors TX, RX, SX, and DX as explained below. The transfer transistor TX transfers photogenerated charges collected by the photodiode PD to a floating diffusion region FD. The reset transistor RX serves to set the potential of a node to a desired value and discharge the photogenerated charges to reset the floating diffusion region FD.
The drive transistor DX serves as a source follower buffer amplifier. The select transistor SX performs addressing through a switching operation.
Here, the transfer transistor TX and the reset transistor RX include a native NMOS transistor, and the drive transistor DX and the select transistor SX include a normal NMOS transistor. The reset transistor RX is a transistor for correlated double sampling (CDS).
That is, in each image pixel of the CMOS image sensor, general CMOS elements are used to implement the photodiode and the transistors. Therefore, the existing CMOS process may be applied. Accordingly, an integrated image signal processing and detecting unit may be provided in a block outside the pixel.
FIG. 1 is a cross-sectional view of a conventional CMOS image sensor.
Referring to FIG. 1, a punch-through prevention layer 12 is formed over a substrate 11. Furthermore, an epitaxially-grown silicon epitaxial layer 13 is formed over the punch-through prevention layer 12. An isolation layer 14 is formed from the surface of the silicon epitaxial layer 13 to be separated from the punch-through prevention layer 12.
A gate dielectric layer 15A is formed over the silicon epitaxial layer 13, a polysilicon layer 15B is formed over the gate dielectric layer 15A, and a tungsten silicide layer 15C is formed over the polysilicon layer 15B, thereby forming a gate electrode 15 of a transfer transistor TX. An N-type diffusion layer 16 is formed inside the silicon epitaxial layer 13 while aligned with one edge of the gate electrode 15, and a P-type diffusion layer 17 is formed over the N-type diffusion layer 16 and below the surface of the silicon epitaxial layer 13 while aligned with the one edge of the gate electrode 15. As a result, a photodiode PD including the N-type diffusion layer 16 and the P-type diffusion layer 17 is formed. Furthermore, a floating diffusion region 18 is formed inside the silicon epitaxial layer 13 while aligned with the other edge of the gate electrode 15.
In the above-described conventional CMOS image sensor, when light is incident, the N-type diffusion layer 16, which serves as a depletion layer, generates an electron hole pair (EHP). A hole h of the EHP escapes to the punch-through prevention layer 12, and an electron e is stored and then moved to the floating diffusion region 18 through the transfer transistor TX. Then, the electron e is converted into image data.
The conventional CMOS image sensor has concerns regarding the occurrence of dark current and decrease in photosensitivity. That is, when strong light is irradiated from outside for a long time, the photogenerated charges of the photodiode PD are partially transferred to the floating diffusion region 18 through a channel of the gate electrode 15, thereby causing dark current. Accordingly, the photosensitivity decreases.
Here, a technique to apply a negative charge pumping (NCP) bias to the gate electrode 15 may be adopted to prevent the dark current and improve the photosensitivity. In this case, a blooming phenomenon that deteriorates a trade-off characteristic may occur.
The blooming phenomenon includes pixel blooming and dark blooming. In particular, the dark blooming is a defect source that may cause a large yield loss.
The blooming phenomenon occurs due to a channel blocking of a gate electrode based on a barrier increase of the gate electrode caused by the application of the NCP bias to the gate electrode. Furthermore, when a specific photodiode is fully charged under a high illumination condition during a specific integration time in the photodiode or under a dark condition caused by a large defect source of the photodiode, photogenerated charges may leak to adjacent pixels through the substrate due to the channel blocking of the gate electrode when the NCP bias is not applied to the gate electrode.